The present invention relates to a structure of a power supply path utilized in the design of an integrated circuit and more particularly, it relates to a technique of estimating charge and discharge times and power consumption of a part in which a power supply voltage is controlled. When a voltage supplied to a part of an integrated circuit or the whole thereof is controlled, it is necessary to estimate charge and discharge times of the part to be controlled. When performing this estimate, a resistance value and a stray capacitance value of a main line, and a resistance value and a stray capacitance value of an outgoing line are comprehensively considered in order to calculate the charge and discharge times.
The estimate of the charge and discharge times is made after cell arrangement is completed and the power supply path is determined. Even when configurations and dimensions of the outgoing lines of the power supply path are different from each other, since the estimate is made after the cell arrangement is completed, there is no problem. In other words, since the estimate is made after the cell arrangement is completed, correlation of the configurations and dimensions of the outgoing lines can be various.
However, in recent years, a high-performance and sophisticated system has been increasingly developed. Accordingly, referring to the estimate for the charge and discharge times and power consumption, it is necessary that the estimate be made at an early stage of the design process instead of being made after the cell arrangement is completed.